// **************************************************************
// COPYRIGHT(c)2020, Xidian University
// All rights reserved.
//
// IP LIB INDEX :  
// IP Name      :      
// File name    :  
// Module name  : bv1_256 
// Full name    :  
// Time         : 2020 
// Author       : Haoxiaofei 
// Email        : 1531804419@qq.com
// Data         : 
// Version      : V 1.0 
// 
// Abstract     :
// Called by    :  
// 
// Modification history
// -----------------------------------------------------------------
// 
// 
//
// *****************************************************************

// **************************************************************
// *******************
// TIMESCALE
// ******************* 
`timescale 1ns/1ps 

// *******************
// INFORMATION
// *******************

//*******************
//DEFINE(s)
//*******************
//*******************
//DEFINE MODULE PORT
//*******************
module bv5_256
    #(parameter LOG2R    = 3 ,
      parameter RULE_L   = 256,
      parameter RULE_SUM = 32,
      parameter PE_X     = 64,
      parameter PE_Y     = 4,
      parameter LOG2Y    = 2,
      parameter LOG2X    = 6, 
      parameter PE_DEPTH = 16,
      parameter PE_WIDTH = 8
    )
    (
    input wire clk,
    input wire rst_n,
    input wire lookup_en,
    //cpu???
    input wire[10:0] ram_addr,//00000000-000007ff???bv1?§Ö?????
    // input wire[15:0] ram_addr,//00000000-000007ff???bv1?§Ö?????
    input wire[31:0] ram_data,
    // input wire[31:0] ram_ctrl, //[0]¦Ë??????????????[1]¦Ë??????,????????§¹
    input wire cpu_wen,
    input wire cpu_ren,
    output reg[31:0] read_data_cpu,
    output reg me_array_bv5_dpram_valid,
    //??????
    input  wire[RULE_L-1:0] rule_in1,
    output wire[0:RULE_SUM-1] match_res1,    
    output reg lookup_done1
    //output reg lookup_success1
    ); 

//*******************
//DEFINE LOCAL PARAMETER
//*******************
//parameter(s)

             
            
//*********************
//INNER SIGNAL DECLARATION
//*********************
//REGS


// reg lookup_en_ff1,lookup_en_ff2,lookup_en_ff3;
wire lookup_en_ff;
wire lookup_done1_ff;
wire lookup_success1_ff;
// reg del_en_f1,del_en_f2;
// wire del_en;
wire[15:0] cpu_data_o0,cpu_data_o1,cpu_data_o2,cpu_data_o3;

reg modify_en_f1,modify_en_f2;
wire modify_en;

reg modify_en1,modify_en2,modify_en3,modify_en4;
reg[0:RULE_SUM-1] valid;

// wire del_en_w;
wire read_en_w;
wire read_en;
reg[LOG2Y+LOG2R-1:0] del_loc;
reg[LOG2Y+LOG2R-1:0] modify_loc;
wire modify_en_w;
wire[LOG2Y-1:0] pipeline_num;
reg[LOG2R-1:0] rule_num;
reg[LOG2X-1:0] pe_num;
reg[PE_DEPTH-1:0] modify_value;


// assign del_en_w     = (ram_addr<=32'h00006fff) ? 1'b0: ((ram_addr<=32'h000077ff)?  ram_ctrl[1] :1'b0);
// assign modify_en_w  = (ram_addr<=32'h00006fff) ? 1'b0: ((ram_addr<=32'h000077ff)?  ram_ctrl[0] :1'b0); 
// assign read_en_w    = (ram_addr<=32'h00006fff) ? 1'b0: ((ram_addr<=32'h000077ff)?  ram_ctrl[2] :1'b0);

assign modify_en_w  = cpu_wen;
assign read_en_w    = cpu_ren;

wire[7:0]  bv_out1_1;
wire[15:0] bv_out1_2;
wire[23:0] bv_out1_3;
wire[31:0] bv_out1_4;
wire lookup_en_out1,lookup_en_out2,lookup_en_out3;

//WIRES
wire[3:0]  rule_out1_0_1;
wire[3:0]  rule_out1_1_1;
wire[3:0]  rule_out1_2_1;
wire[3:0]  rule_out1_3_1;
wire[3:0]  rule_out1_4_1;
wire[3:0]  rule_out1_5_1;
wire[3:0]  rule_out1_6_1;
wire[3:0]  rule_out1_7_1;
wire[3:0]  rule_out1_8_1;
wire[3:0]  rule_out1_9_1;
wire[3:0] rule_out1_10_1;
wire[3:0] rule_out1_11_1;
wire[3:0] rule_out1_12_1;
wire[3:0] rule_out1_13_1;
wire[3:0] rule_out1_14_1;
wire[3:0] rule_out1_15_1;
wire[3:0] rule_out1_16_1;
wire[3:0] rule_out1_17_1;
wire[3:0] rule_out1_18_1;
wire[3:0] rule_out1_19_1;
wire[3:0] rule_out1_20_1;
wire[3:0] rule_out1_21_1;
wire[3:0] rule_out1_22_1;
wire[3:0] rule_out1_23_1;
wire[3:0] rule_out1_24_1;
wire[3:0] rule_out1_25_1;
wire[3:0] rule_out1_26_1;
wire[3:0] rule_out1_27_1;
wire[3:0] rule_out1_28_1;
wire[3:0] rule_out1_29_1;
wire[3:0] rule_out1_30_1;
wire[3:0] rule_out1_31_1;
wire[3:0] rule_out1_32_1;
wire[3:0] rule_out1_33_1;
wire[3:0] rule_out1_34_1;
wire[3:0] rule_out1_35_1;
wire[3:0] rule_out1_36_1;
wire[3:0] rule_out1_37_1;
wire[3:0] rule_out1_38_1;
wire[3:0] rule_out1_39_1;
wire[3:0] rule_out1_40_1;
wire[3:0] rule_out1_41_1;
wire[3:0] rule_out1_42_1;
wire[3:0] rule_out1_43_1;
wire[3:0] rule_out1_44_1;
wire[3:0] rule_out1_45_1;
wire[3:0] rule_out1_46_1;
wire[3:0] rule_out1_47_1;
wire[3:0] rule_out1_48_1;
wire[3:0] rule_out1_49_1;
wire[3:0] rule_out1_50_1;
wire[3:0] rule_out1_51_1;
wire[3:0] rule_out1_52_1;
wire[3:0] rule_out1_53_1;
wire[3:0] rule_out1_54_1;
wire[3:0] rule_out1_55_1;
wire[3:0] rule_out1_56_1;
wire[3:0] rule_out1_57_1;
wire[3:0] rule_out1_58_1;
wire[3:0] rule_out1_59_1;
wire[3:0] rule_out1_60_1;
wire[3:0] rule_out1_61_1;
wire[3:0] rule_out1_62_1;
wire[3:0] rule_out1_63_1;


wire[3:0]  rule_out1_0_2;
wire[3:0]  rule_out1_1_2;
wire[3:0]  rule_out1_2_2;
wire[3:0]  rule_out1_3_2;
wire[3:0]  rule_out1_4_2;
wire[3:0]  rule_out1_5_2;
wire[3:0]  rule_out1_6_2;
wire[3:0]  rule_out1_7_2;
wire[3:0]  rule_out1_8_2;
wire[3:0]  rule_out1_9_2;
wire[3:0] rule_out1_10_2;
wire[3:0] rule_out1_11_2;
wire[3:0] rule_out1_12_2;
wire[3:0] rule_out1_13_2;
wire[3:0] rule_out1_14_2;
wire[3:0] rule_out1_15_2;
wire[3:0] rule_out1_16_2;
wire[3:0] rule_out1_17_2;
wire[3:0] rule_out1_18_2;
wire[3:0] rule_out1_19_2;
wire[3:0] rule_out1_20_2;
wire[3:0] rule_out1_21_2;
wire[3:0] rule_out1_22_2;
wire[3:0] rule_out1_23_2;
wire[3:0] rule_out1_24_2;
wire[3:0] rule_out1_25_2;
wire[3:0] rule_out1_26_2;
wire[3:0] rule_out1_27_2;
wire[3:0] rule_out1_28_2;
wire[3:0] rule_out1_29_2;
wire[3:0] rule_out1_30_2;
wire[3:0] rule_out1_31_2;
wire[3:0] rule_out1_32_2;
wire[3:0] rule_out1_33_2;
wire[3:0] rule_out1_34_2;
wire[3:0] rule_out1_35_2;
wire[3:0] rule_out1_36_2;
wire[3:0] rule_out1_37_2;
wire[3:0] rule_out1_38_2;
wire[3:0] rule_out1_39_2;
wire[3:0] rule_out1_40_2;
wire[3:0] rule_out1_41_2;
wire[3:0] rule_out1_42_2;
wire[3:0] rule_out1_43_2;
wire[3:0] rule_out1_44_2;
wire[3:0] rule_out1_45_2;
wire[3:0] rule_out1_46_2;
wire[3:0] rule_out1_47_2;
wire[3:0] rule_out1_48_2;
wire[3:0] rule_out1_49_2;
wire[3:0] rule_out1_50_2;
wire[3:0] rule_out1_51_2;
wire[3:0] rule_out1_52_2;
wire[3:0] rule_out1_53_2;
wire[3:0] rule_out1_54_2;
wire[3:0] rule_out1_55_2;
wire[3:0] rule_out1_56_2;
wire[3:0] rule_out1_57_2;
wire[3:0] rule_out1_58_2;
wire[3:0] rule_out1_59_2;
wire[3:0] rule_out1_60_2;
wire[3:0] rule_out1_61_2;
wire[3:0] rule_out1_62_2;
wire[3:0] rule_out1_63_2;

wire[3:0]  rule_out1_0_3;
wire[3:0]  rule_out1_1_3;
wire[3:0]  rule_out1_2_3;
wire[3:0]  rule_out1_3_3;
wire[3:0]  rule_out1_4_3;
wire[3:0]  rule_out1_5_3;
wire[3:0]  rule_out1_6_3;
wire[3:0]  rule_out1_7_3;
wire[3:0]  rule_out1_8_3;
wire[3:0]  rule_out1_9_3;
wire[3:0] rule_out1_10_3;
wire[3:0] rule_out1_11_3;
wire[3:0] rule_out1_12_3;
wire[3:0] rule_out1_13_3;
wire[3:0] rule_out1_14_3;
wire[3:0] rule_out1_15_3;
wire[3:0] rule_out1_16_3;
wire[3:0] rule_out1_17_3;
wire[3:0] rule_out1_18_3;
wire[3:0] rule_out1_19_3;
wire[3:0] rule_out1_20_3;
wire[3:0] rule_out1_21_3;
wire[3:0] rule_out1_22_3;
wire[3:0] rule_out1_23_3;
wire[3:0] rule_out1_24_3;
wire[3:0] rule_out1_25_3;
wire[3:0] rule_out1_26_3;
wire[3:0] rule_out1_27_3;
wire[3:0] rule_out1_28_3;
wire[3:0] rule_out1_29_3;
wire[3:0] rule_out1_30_3;
wire[3:0] rule_out1_31_3;
wire[3:0] rule_out1_32_3;
wire[3:0] rule_out1_33_3;
wire[3:0] rule_out1_34_3;
wire[3:0] rule_out1_35_3;
wire[3:0] rule_out1_36_3;
wire[3:0] rule_out1_37_3;
wire[3:0] rule_out1_38_3;
wire[3:0] rule_out1_39_3;
wire[3:0] rule_out1_40_3;
wire[3:0] rule_out1_41_3;
wire[3:0] rule_out1_42_3;
wire[3:0] rule_out1_43_3;
wire[3:0] rule_out1_44_3;
wire[3:0] rule_out1_45_3;
wire[3:0] rule_out1_46_3;
wire[3:0] rule_out1_47_3;
wire[3:0] rule_out1_48_3;
wire[3:0] rule_out1_49_3;
wire[3:0] rule_out1_50_3;
wire[3:0] rule_out1_51_3;
wire[3:0] rule_out1_52_3;
wire[3:0] rule_out1_53_3;
wire[3:0] rule_out1_54_3;
wire[3:0] rule_out1_55_3;
wire[3:0] rule_out1_56_3;
wire[3:0] rule_out1_57_3;
wire[3:0] rule_out1_58_3;
wire[3:0] rule_out1_59_3;
wire[3:0] rule_out1_60_3;
wire[3:0] rule_out1_61_3;
wire[3:0] rule_out1_62_3;
wire[3:0] rule_out1_63_3;
//*********************
//INSTANTCE MODULE
//*********************

assign lookup_en_ff = lookup_en;  

pe_pipeline #(.PIPELINE_NUM(0)) U1(
    .clk(clk),
    .rst_n(rst_n),
    .rule_in1(rule_in1),
    .lookup_en(lookup_en_ff),
    .modify_en(modify_en1),
    .modify_value(modify_value),
    .modify_loc(rule_num),
    .cpu_data_o(cpu_data_o0),
    .pe_num(pe_num),
    .valid_in1(valid[0:7]),
    .bv_out1(bv_out1_1),
    // .lookup_end(),
    .lookup_en_out(lookup_en_out1),
    // .lookup_done1(),
    // .lookup_done2(),
    .rule_out1_0_bar ( rule_out1_0_1),           
    .rule_out1_1_bar ( rule_out1_1_1),       
    .rule_out1_2_bar ( rule_out1_2_1),       
    .rule_out1_3_bar ( rule_out1_3_1),       
    .rule_out1_4_bar ( rule_out1_4_1),       
    .rule_out1_5_bar ( rule_out1_5_1),       
    .rule_out1_6_bar ( rule_out1_6_1),       
    .rule_out1_7_bar ( rule_out1_7_1),       
    .rule_out1_8_bar ( rule_out1_8_1),       
    .rule_out1_9_bar ( rule_out1_9_1),       
    .rule_out1_10_bar(rule_out1_10_1),       
    .rule_out1_11_bar(rule_out1_11_1),       
    .rule_out1_12_bar(rule_out1_12_1),       
    .rule_out1_13_bar(rule_out1_13_1),       
    .rule_out1_14_bar(rule_out1_14_1),       
    .rule_out1_15_bar(rule_out1_15_1),       
    .rule_out1_16_bar(rule_out1_16_1),       
    .rule_out1_17_bar(rule_out1_17_1),       
    .rule_out1_18_bar(rule_out1_18_1),       
    .rule_out1_19_bar(rule_out1_19_1),       
    .rule_out1_20_bar(rule_out1_20_1),       
    .rule_out1_21_bar(rule_out1_21_1),       
    .rule_out1_22_bar(rule_out1_22_1),       
    .rule_out1_23_bar(rule_out1_23_1),       
    .rule_out1_24_bar(rule_out1_24_1),       
    .rule_out1_25_bar(rule_out1_25_1),       
    .rule_out1_26_bar(rule_out1_26_1),       
    .rule_out1_27_bar(rule_out1_27_1),       
    .rule_out1_28_bar(rule_out1_28_1),       
    .rule_out1_29_bar(rule_out1_29_1),       
    .rule_out1_30_bar(rule_out1_30_1),       
    .rule_out1_31_bar(rule_out1_31_1),   
    .rule_out1_32_bar(rule_out1_32_1),   
    .rule_out1_33_bar(rule_out1_33_1),   
    .rule_out1_34_bar(rule_out1_34_1),   
    .rule_out1_35_bar(rule_out1_35_1),   
    .rule_out1_36_bar(rule_out1_36_1),
    .rule_out1_37_bar(rule_out1_37_1),
    .rule_out1_38_bar(rule_out1_38_1),
    .rule_out1_39_bar(rule_out1_39_1),       
    .rule_out1_40_bar(rule_out1_40_1),       
    .rule_out1_41_bar(rule_out1_41_1),       
    .rule_out1_42_bar(rule_out1_42_1),       
    .rule_out1_43_bar(rule_out1_43_1),       
    .rule_out1_44_bar(rule_out1_44_1),       
    .rule_out1_45_bar(rule_out1_45_1),       
    .rule_out1_46_bar(rule_out1_46_1),       
    .rule_out1_47_bar(rule_out1_47_1),       
    .rule_out1_48_bar(rule_out1_48_1),       
    .rule_out1_49_bar(rule_out1_49_1),       
    .rule_out1_50_bar(rule_out1_50_1),       
    .rule_out1_51_bar(rule_out1_51_1),   
    .rule_out1_52_bar(rule_out1_52_1),   
    .rule_out1_53_bar(rule_out1_53_1),   
    .rule_out1_54_bar(rule_out1_54_1),   
    .rule_out1_55_bar(rule_out1_55_1),   
    .rule_out1_56_bar(rule_out1_56_1),
    .rule_out1_57_bar(rule_out1_57_1),
    .rule_out1_58_bar(rule_out1_58_1),
    .rule_out1_59_bar(rule_out1_59_1),
    .rule_out1_60_bar(rule_out1_60_1),       
    .rule_out1_61_bar(rule_out1_61_1),   
    .rule_out1_62_bar(rule_out1_62_1),   
    .rule_out1_63_bar(rule_out1_63_1)
    );
pe_pipeline1 #(.PIPELINE_NUM(1)) U2(
    .clk(clk),
    .rst_n(rst_n),
    .rule_in1_0 ( rule_out1_0_1),    
    .rule_in1_1 ( rule_out1_1_1),    
    .rule_in1_2 ( rule_out1_2_1),    
    .rule_in1_3 ( rule_out1_3_1),    
    .rule_in1_4 ( rule_out1_4_1),    
    .rule_in1_5 ( rule_out1_5_1),    
    .rule_in1_6 ( rule_out1_6_1),    
    .rule_in1_7 ( rule_out1_7_1),    
    .rule_in1_8 ( rule_out1_8_1),
    .rule_in1_9 ( rule_out1_9_1),
    .rule_in1_10(rule_out1_10_1),
    .rule_in1_11(rule_out1_11_1),
    .rule_in1_12(rule_out1_12_1),
    .rule_in1_13(rule_out1_13_1),
    .rule_in1_14(rule_out1_14_1),
    .rule_in1_15(rule_out1_15_1),
    .rule_in1_16(rule_out1_16_1),
    .rule_in1_17(rule_out1_17_1),
    .rule_in1_18(rule_out1_18_1),
    .rule_in1_19(rule_out1_19_1),
    .rule_in1_20(rule_out1_20_1),
    .rule_in1_21(rule_out1_21_1),
    .rule_in1_22(rule_out1_22_1),
    .rule_in1_23(rule_out1_23_1),
    .rule_in1_24(rule_out1_24_1),
    .rule_in1_25(rule_out1_25_1),
    .rule_in1_26(rule_out1_26_1),
    .rule_in1_27(rule_out1_27_1),
    .rule_in1_28(rule_out1_28_1),
    .rule_in1_29(rule_out1_29_1),
    .rule_in1_30(rule_out1_30_1),
    .rule_in1_31(rule_out1_31_1),
    .rule_in1_32(rule_out1_32_1),
    .rule_in1_33(rule_out1_33_1),
    .rule_in1_34(rule_out1_34_1),
    .rule_in1_35(rule_out1_35_1),
    .rule_in1_36(rule_out1_36_1),
    .rule_in1_37(rule_out1_37_1),
    .rule_in1_38(rule_out1_38_1),
    .rule_in1_39(rule_out1_39_1),       
    .rule_in1_40(rule_out1_40_1),       
    .rule_in1_41(rule_out1_41_1),       
    .rule_in1_42(rule_out1_42_1),       
    .rule_in1_43(rule_out1_43_1),       
    .rule_in1_44(rule_out1_44_1),       
    .rule_in1_45(rule_out1_45_1),       
    .rule_in1_46(rule_out1_46_1),       
    .rule_in1_47(rule_out1_47_1),       
    .rule_in1_48(rule_out1_48_1),       
    .rule_in1_49(rule_out1_49_1),       
    .rule_in1_50(rule_out1_50_1),       
    .rule_in1_51(rule_out1_51_1),   
    .rule_in1_52(rule_out1_52_1),   
    .rule_in1_53(rule_out1_53_1),   
    .rule_in1_54(rule_out1_54_1),   
    .rule_in1_55(rule_out1_55_1),   
    .rule_in1_56(rule_out1_56_1),
    .rule_in1_57(rule_out1_57_1),
    .rule_in1_58(rule_out1_58_1),
    .rule_in1_59(rule_out1_59_1),
    .rule_in1_60(rule_out1_60_1),       
    .rule_in1_61(rule_out1_61_1),   
    .rule_in1_62(rule_out1_62_1),   
    .rule_in1_63(rule_out1_63_1),
    .lookup_en(lookup_en_out1),
    .pe_num(pe_num),
    .cpu_data_o(cpu_data_o1),
    // .lookup_end(),
    .lookup_en_out(lookup_en_out2),
    .modify_en(modify_en2),
    .modify_value(modify_value),
    .modify_loc(rule_num),
    .valid_in1(valid[8:15]),
    .bv_in1(bv_out1_1),
    .bv_out1(bv_out1_2),
    .lookup_done1(),
    .lookup_success1(),
    .rule_out1_0_bar ( rule_out1_0_2),    
    .rule_out1_1_bar ( rule_out1_1_2),
    .rule_out1_2_bar ( rule_out1_2_2),
    .rule_out1_3_bar ( rule_out1_3_2),
    .rule_out1_4_bar ( rule_out1_4_2),
    .rule_out1_5_bar ( rule_out1_5_2),
    .rule_out1_6_bar ( rule_out1_6_2),
    .rule_out1_7_bar ( rule_out1_7_2),
    .rule_out1_8_bar ( rule_out1_8_2),
    .rule_out1_9_bar ( rule_out1_9_2),
    .rule_out1_10_bar(rule_out1_10_2),
    .rule_out1_11_bar(rule_out1_11_2),
    .rule_out1_12_bar(rule_out1_12_2),
    .rule_out1_13_bar(rule_out1_13_2),
    .rule_out1_14_bar(rule_out1_14_2),
    .rule_out1_15_bar(rule_out1_15_2),
    .rule_out1_16_bar(rule_out1_16_2),
    .rule_out1_17_bar(rule_out1_17_2),
    .rule_out1_18_bar(rule_out1_18_2),
    .rule_out1_19_bar(rule_out1_19_2),
    .rule_out1_20_bar(rule_out1_20_2),
    .rule_out1_21_bar(rule_out1_21_2),
    .rule_out1_22_bar(rule_out1_22_2),
    .rule_out1_23_bar(rule_out1_23_2),
    .rule_out1_24_bar(rule_out1_24_2),
    .rule_out1_25_bar(rule_out1_25_2),
    .rule_out1_26_bar(rule_out1_26_2),
    .rule_out1_27_bar(rule_out1_27_2),
    .rule_out1_28_bar(rule_out1_28_2),
    .rule_out1_29_bar(rule_out1_29_2),
    .rule_out1_30_bar(rule_out1_30_2),
    .rule_out1_31_bar(rule_out1_31_2),
    .rule_out1_32_bar(rule_out1_32_2),
    .rule_out1_33_bar(rule_out1_33_2),
    .rule_out1_34_bar(rule_out1_34_2),
    .rule_out1_35_bar(rule_out1_35_2),
    .rule_out1_36_bar(rule_out1_36_2),
    .rule_out1_37_bar(rule_out1_37_2),
    .rule_out1_38_bar(rule_out1_38_2),
    .rule_out1_39_bar(rule_out1_39_2),       
    .rule_out1_40_bar(rule_out1_40_2),       
    .rule_out1_41_bar(rule_out1_41_2),       
    .rule_out1_42_bar(rule_out1_42_2),       
    .rule_out1_43_bar(rule_out1_43_2),       
    .rule_out1_44_bar(rule_out1_44_2),       
    .rule_out1_45_bar(rule_out1_45_2),       
    .rule_out1_46_bar(rule_out1_46_2),       
    .rule_out1_47_bar(rule_out1_47_2),       
    .rule_out1_48_bar(rule_out1_48_2),       
    .rule_out1_49_bar(rule_out1_49_2),       
    .rule_out1_50_bar(rule_out1_50_2),       
    .rule_out1_51_bar(rule_out1_51_2),   
    .rule_out1_52_bar(rule_out1_52_2),   
    .rule_out1_53_bar(rule_out1_53_2),   
    .rule_out1_54_bar(rule_out1_54_2),   
    .rule_out1_55_bar(rule_out1_55_2),   
    .rule_out1_56_bar(rule_out1_56_2),
    .rule_out1_57_bar(rule_out1_57_2),
    .rule_out1_58_bar(rule_out1_58_2),
    .rule_out1_59_bar(rule_out1_59_2),
    .rule_out1_60_bar(rule_out1_60_2),       
    .rule_out1_61_bar(rule_out1_61_2),   
    .rule_out1_62_bar(rule_out1_62_2),   
    .rule_out1_63_bar(rule_out1_63_2)  
    );
pe_pipeline1 #(.PIPELINE_NUM(2)) U3(
    .clk(clk),
    .rst_n(rst_n),
    .rule_in1_0 ( rule_out1_0_2),
    .rule_in1_1 ( rule_out1_1_2),
    .rule_in1_2 ( rule_out1_2_2),
    .rule_in1_3 ( rule_out1_3_2),
    .rule_in1_4 ( rule_out1_4_2),
    .rule_in1_5 ( rule_out1_5_2),
    .rule_in1_6 ( rule_out1_6_2),
    .rule_in1_7 ( rule_out1_7_2),
    .rule_in1_8 ( rule_out1_8_2),
    .rule_in1_9 ( rule_out1_9_2),
    .rule_in1_10(rule_out1_10_2),
    .rule_in1_11(rule_out1_11_2),
    .rule_in1_12(rule_out1_12_2),
    .rule_in1_13(rule_out1_13_2),
    .rule_in1_14(rule_out1_14_2),
    .rule_in1_15(rule_out1_15_2),
    .rule_in1_16(rule_out1_16_2),
    .rule_in1_17(rule_out1_17_2),
    .rule_in1_18(rule_out1_18_2),
    .rule_in1_19(rule_out1_19_2),
    .rule_in1_20(rule_out1_20_2),
    .rule_in1_21(rule_out1_21_2),
    .rule_in1_22(rule_out1_22_2),
    .rule_in1_23(rule_out1_23_2),
    .rule_in1_24(rule_out1_24_2),
    .rule_in1_25(rule_out1_25_2),
    .rule_in1_26(rule_out1_26_2),
    .rule_in1_27(rule_out1_27_2),
    .rule_in1_28(rule_out1_28_2),
    .rule_in1_29(rule_out1_29_2),
    .rule_in1_30(rule_out1_30_2),
    .rule_in1_31(rule_out1_31_2),
    .rule_in1_32(rule_out1_32_2),
    .rule_in1_33(rule_out1_33_2),
    .rule_in1_34(rule_out1_34_2),
    .rule_in1_35(rule_out1_35_2),
    .rule_in1_36(rule_out1_36_2),
    .rule_in1_37(rule_out1_37_2),
    .rule_in1_38(rule_out1_38_2),
    .rule_in1_39(rule_out1_39_2),       
    .rule_in1_40(rule_out1_40_2),       
    .rule_in1_41(rule_out1_41_2),       
    .rule_in1_42(rule_out1_42_2),       
    .rule_in1_43(rule_out1_43_2),       
    .rule_in1_44(rule_out1_44_2),       
    .rule_in1_45(rule_out1_45_2),       
    .rule_in1_46(rule_out1_46_2),       
    .rule_in1_47(rule_out1_47_2),       
    .rule_in1_48(rule_out1_48_2),       
    .rule_in1_49(rule_out1_49_2),       
    .rule_in1_50(rule_out1_50_2),       
    .rule_in1_51(rule_out1_51_2),   
    .rule_in1_52(rule_out1_52_2),   
    .rule_in1_53(rule_out1_53_2),   
    .rule_in1_54(rule_out1_54_2),   
    .rule_in1_55(rule_out1_55_2),   
    .rule_in1_56(rule_out1_56_2),
    .rule_in1_57(rule_out1_57_2),
    .rule_in1_58(rule_out1_58_2),
    .rule_in1_59(rule_out1_59_2),
    .rule_in1_60(rule_out1_60_2),       
    .rule_in1_61(rule_out1_61_2),   
    .rule_in1_62(rule_out1_62_2),   
    .rule_in1_63(rule_out1_63_2),
    .pe_num(pe_num),
    .lookup_en(lookup_en_out2),
    // .lookup_end(),
    .lookup_en_out(lookup_en_out3),
    .modify_en(modify_en3),
    .cpu_data_o(cpu_data_o2),
    .modify_value(modify_value),
    .modify_loc(rule_num),
    .valid_in1(valid[16:23]),

    .bv_in1(bv_out1_2),
    .bv_out1(bv_out1_3),
    .lookup_done1(),
    .lookup_success1(),
    .rule_out1_0_bar ( rule_out1_0_3),    
    .rule_out1_1_bar ( rule_out1_1_3),
    .rule_out1_2_bar ( rule_out1_2_3),
    .rule_out1_3_bar ( rule_out1_3_3),
    .rule_out1_4_bar ( rule_out1_4_3),
    .rule_out1_5_bar ( rule_out1_5_3),
    .rule_out1_6_bar ( rule_out1_6_3),
    .rule_out1_7_bar ( rule_out1_7_3),
    .rule_out1_8_bar ( rule_out1_8_3),
    .rule_out1_9_bar ( rule_out1_9_3),
    .rule_out1_10_bar(rule_out1_10_3),
    .rule_out1_11_bar(rule_out1_11_3),
    .rule_out1_12_bar(rule_out1_12_3),
    .rule_out1_13_bar(rule_out1_13_3),
    .rule_out1_14_bar(rule_out1_14_3),
    .rule_out1_15_bar(rule_out1_15_3),
    .rule_out1_16_bar(rule_out1_16_3),
    .rule_out1_17_bar(rule_out1_17_3),
    .rule_out1_18_bar(rule_out1_18_3),
    .rule_out1_19_bar(rule_out1_19_3),
    .rule_out1_20_bar(rule_out1_20_3),
    .rule_out1_21_bar(rule_out1_21_3),
    .rule_out1_22_bar(rule_out1_22_3),
    .rule_out1_23_bar(rule_out1_23_3),
    .rule_out1_24_bar(rule_out1_24_3),
    .rule_out1_25_bar(rule_out1_25_3),
    .rule_out1_26_bar(rule_out1_26_3),
    .rule_out1_27_bar(rule_out1_27_3),
    .rule_out1_28_bar(rule_out1_28_3),
    .rule_out1_29_bar(rule_out1_29_3),
    .rule_out1_30_bar(rule_out1_30_3),
    .rule_out1_31_bar(rule_out1_31_3),
    .rule_out1_32_bar(rule_out1_32_3),
    .rule_out1_33_bar(rule_out1_33_3),
    .rule_out1_34_bar(rule_out1_34_3),
    .rule_out1_35_bar(rule_out1_35_3),
    .rule_out1_36_bar(rule_out1_36_3),
    .rule_out1_37_bar(rule_out1_37_3),
    .rule_out1_38_bar(rule_out1_38_3),
    .rule_out1_39_bar(rule_out1_39_3),       
    .rule_out1_40_bar(rule_out1_40_3),       
    .rule_out1_41_bar(rule_out1_41_3),       
    .rule_out1_42_bar(rule_out1_42_3),       
    .rule_out1_43_bar(rule_out1_43_3),       
    .rule_out1_44_bar(rule_out1_44_3),       
    .rule_out1_45_bar(rule_out1_45_3),       
    .rule_out1_46_bar(rule_out1_46_3),       
    .rule_out1_47_bar(rule_out1_47_3),       
    .rule_out1_48_bar(rule_out1_48_3),       
    .rule_out1_49_bar(rule_out1_49_3),       
    .rule_out1_50_bar(rule_out1_50_3),       
    .rule_out1_51_bar(rule_out1_51_3),   
    .rule_out1_52_bar(rule_out1_52_3),   
    .rule_out1_53_bar(rule_out1_53_3),   
    .rule_out1_54_bar(rule_out1_54_3),   
    .rule_out1_55_bar(rule_out1_55_3),   
    .rule_out1_56_bar(rule_out1_56_3),
    .rule_out1_57_bar(rule_out1_57_3),
    .rule_out1_58_bar(rule_out1_58_3),
    .rule_out1_59_bar(rule_out1_59_3),
    .rule_out1_60_bar(rule_out1_60_3),       
    .rule_out1_61_bar(rule_out1_61_3),   
    .rule_out1_62_bar(rule_out1_62_3),   
    .rule_out1_63_bar(rule_out1_63_3)   
    );
pe_pipeline1 #(.PIPELINE_NUM(3)) U4(
    .clk(clk),
    .rst_n(rst_n),
    .rule_in1_0 ( rule_out1_0_3),
    .rule_in1_1 ( rule_out1_1_3),
    .rule_in1_2 ( rule_out1_2_3),
    .rule_in1_3 ( rule_out1_3_3),
    .rule_in1_4 ( rule_out1_4_3),
    .rule_in1_5 ( rule_out1_5_3),
    .rule_in1_6 ( rule_out1_6_3),
    .rule_in1_7 ( rule_out1_7_3),
    .rule_in1_8 ( rule_out1_8_3),
    .rule_in1_9 ( rule_out1_9_3),
    .rule_in1_10(rule_out1_10_3),
    .rule_in1_11(rule_out1_11_3),
    .rule_in1_12(rule_out1_12_3),
    .rule_in1_13(rule_out1_13_3),
    .rule_in1_14(rule_out1_14_3),
    .rule_in1_15(rule_out1_15_3),
    .rule_in1_16(rule_out1_16_3),
    .rule_in1_17(rule_out1_17_3),
    .rule_in1_18(rule_out1_18_3),
    .rule_in1_19(rule_out1_19_3),
    .rule_in1_20(rule_out1_20_3),
    .rule_in1_21(rule_out1_21_3),
    .rule_in1_22(rule_out1_22_3),
    .rule_in1_23(rule_out1_23_3),
    .rule_in1_24(rule_out1_24_3),
    .rule_in1_25(rule_out1_25_3),
    .rule_in1_26(rule_out1_26_3),
    .rule_in1_27(rule_out1_27_3),
    .rule_in1_28(rule_out1_28_3),
    .rule_in1_29(rule_out1_29_3),
    .rule_in1_30(rule_out1_30_3),
    .rule_in1_31(rule_out1_31_3),
    .rule_in1_32(rule_out1_32_3),
    .rule_in1_33(rule_out1_33_3),
    .rule_in1_34(rule_out1_34_3),
    .rule_in1_35(rule_out1_35_3),
    .rule_in1_36(rule_out1_36_3),
    .rule_in1_37(rule_out1_37_3),
    .rule_in1_38(rule_out1_38_3),
    .rule_in1_39(rule_out1_39_3),       
    .rule_in1_40(rule_out1_40_3),       
    .rule_in1_41(rule_out1_41_3),       
    .rule_in1_42(rule_out1_42_3),       
    .rule_in1_43(rule_out1_43_3),       
    .rule_in1_44(rule_out1_44_3),       
    .rule_in1_45(rule_out1_45_3),       
    .rule_in1_46(rule_out1_46_3),       
    .rule_in1_47(rule_out1_47_3),       
    .rule_in1_48(rule_out1_48_3),       
    .rule_in1_49(rule_out1_49_3),       
    .rule_in1_50(rule_out1_50_3),       
    .rule_in1_51(rule_out1_51_3),   
    .rule_in1_52(rule_out1_52_3),   
    .rule_in1_53(rule_out1_53_3),   
    .rule_in1_54(rule_out1_54_3),   
    .rule_in1_55(rule_out1_55_3),   
    .rule_in1_56(rule_out1_56_3),
    .rule_in1_57(rule_out1_57_3),
    .rule_in1_58(rule_out1_58_3),
    .rule_in1_59(rule_out1_59_3),
    .rule_in1_60(rule_out1_60_3),       
    .rule_in1_61(rule_out1_61_3),   
    .rule_in1_62(rule_out1_62_3),   
    .rule_in1_63(rule_out1_63_3),
    .lookup_en(lookup_en_out3),
    .pe_num(pe_num),
    .cpu_data_o(cpu_data_o3),
    // .lookup_end(lookup_end_ff),
    .lookup_en_out(),
    .lookup_success1(lookup_success1_ff),
    .modify_en(modify_en4),
    .modify_value(modify_value),
    .modify_loc(rule_num),
    .valid_in1(valid[24:31]),

    .bv_in1(bv_out1_3),
    .bv_out1(bv_out1_4),
    .lookup_done1(lookup_done1_ff),
    .rule_out1_0_bar ( ),    
    .rule_out1_1_bar ( ),
    .rule_out1_2_bar ( ),
    .rule_out1_3_bar ( ),
    .rule_out1_4_bar ( ),
    .rule_out1_5_bar ( ),
    .rule_out1_6_bar ( ),
    .rule_out1_7_bar ( ),
    .rule_out1_8_bar ( ),
    .rule_out1_9_bar ( ),
    .rule_out1_10_bar( ),
    .rule_out1_11_bar( ),
    .rule_out1_12_bar( ),
    .rule_out1_13_bar( ),
    .rule_out1_14_bar( ),
    .rule_out1_15_bar( ),
    .rule_out1_16_bar( ),
    .rule_out1_17_bar( ),
    .rule_out1_18_bar( ),
    .rule_out1_19_bar( ),
    .rule_out1_20_bar( ),
    .rule_out1_21_bar( ),
    .rule_out1_22_bar( ),
    .rule_out1_23_bar( ),
    .rule_out1_24_bar( ),
    .rule_out1_25_bar( ),
    .rule_out1_26_bar( ),
    .rule_out1_27_bar( ),
    .rule_out1_28_bar( ),
    .rule_out1_29_bar( ),
    .rule_out1_30_bar( ),
    .rule_out1_31_bar( ),
    .rule_out1_32_bar( ),
    .rule_out1_33_bar( ),
    .rule_out1_34_bar( ),
    .rule_out1_35_bar( ),
    .rule_out1_36_bar( ),
    .rule_out1_37_bar( ),
    .rule_out1_38_bar( ),
    .rule_out1_39_bar( ),       
    .rule_out1_40_bar( ),       
    .rule_out1_41_bar( ),       
    .rule_out1_42_bar( ),       
    .rule_out1_43_bar( ),       
    .rule_out1_44_bar( ),       
    .rule_out1_45_bar( ),       
    .rule_out1_46_bar( ),       
    .rule_out1_47_bar( ),       
    .rule_out1_48_bar( ),       
    .rule_out1_49_bar( ),       
    .rule_out1_50_bar( ),       
    .rule_out1_51_bar( ),   
    .rule_out1_52_bar( ),   
    .rule_out1_53_bar( ),   
    .rule_out1_54_bar( ),   
    .rule_out1_55_bar( ),   
    .rule_out1_56_bar( ),
    .rule_out1_57_bar( ),
    .rule_out1_58_bar( ),
    .rule_out1_59_bar( ),
    .rule_out1_60_bar( ),       
    .rule_out1_61_bar( ),   
    .rule_out1_62_bar( ),   
    .rule_out1_63_bar( )
    ); 

//*********************
//MAIN CORE
//********************* 

always@(posedge clk or negedge rst_n)
  begin
     if(~rst_n)
       begin
          {modify_en1,modify_en2,modify_en3,modify_en4} <= 4'b0;
       end
     else if(modify_en)
       begin
           case(pipeline_num)
             0:
               {modify_en1,modify_en2,modify_en3,modify_en4} <= 4'b1000;
             1:
               {modify_en1,modify_en2,modify_en3,modify_en4} <= 4'b0100; 
             2:
               {modify_en1,modify_en2,modify_en3,modify_en4} <= 4'b0010; 
             3:
               {modify_en1,modify_en2,modify_en3,modify_en4} <= 4'b0001; 
             default:
               {modify_en1,modify_en2,modify_en3,modify_en4} <= 4'b0000; 

           endcase
       end
     else 
        {modify_en1,modify_en2,modify_en3,modify_en4} <= 4'b0; 
  end

reg read_en_d1,read_en_d2,read_en_d3,read_en_d4;
reg[1:0] pipeline_num_d1,pipeline_num_d2,pipeline_num_d3;

always@(posedge clk or negedge rst_n)
  begin
    if(~rst_n)
      begin 
      read_en_d1 <= 1'b0;
      read_en_d2 <= 1'b0;
      read_en_d3 <= 1'b0;
      read_en_d4 <= 1'b0;
      end 
    else 
      begin
      read_en_d1 <= read_en_w;
      read_en_d2 <= read_en_d1;
      read_en_d3 <= read_en_d2;
      read_en_d4 <= read_en_d3;
      end
  end
assign read_en = (read_en_d3)&(~read_en_d4);
always@(posedge clk or negedge rst_n)
  begin
    if(~rst_n)
      begin 
      pipeline_num_d1 <= 2'b0;
      pipeline_num_d2 <= 2'b0;
      pipeline_num_d3 <= 2'b0;
      end 
    else 
      begin
      pipeline_num_d1 <= pipeline_num;
      pipeline_num_d2 <= pipeline_num_d1;
      pipeline_num_d3 <= pipeline_num_d2;
      end
  end
always@(posedge clk or negedge rst_n)
  begin
     if(~rst_n)
       begin
          read_data_cpu <= 4'b0;
          me_array_bv5_dpram_valid<='b0;
       end
     else if(read_en)
       begin
           case(pipeline_num_d3)
             0:begin
                  me_array_bv5_dpram_valid <= 1'b1;
                  read_data_cpu <= {16'h0,cpu_data_o0};
               end
             1:begin
                  me_array_bv5_dpram_valid <= 1'b1;
                  read_data_cpu <= {16'h0,cpu_data_o1}; 
               end
             2:begin
                  me_array_bv5_dpram_valid <= 1'b1;
                  read_data_cpu <= {16'h0,cpu_data_o2};
               end 
             3:begin
                  me_array_bv5_dpram_valid <= 1'b1;
                  read_data_cpu <= {16'h0,cpu_data_o3};
               end 
             default:begin
                  me_array_bv5_dpram_valid <= 1'b0;
                  read_data_cpu <= 32'b0; 
                end
           endcase
       end
     else begin
        read_data_cpu <= read_data_cpu;
        me_array_bv5_dpram_valid <= 1'b0; 
     end
  end
// always@(posedge clk or negedge rst_n)
//   begin
//     if(~rst_n)
//       begin 
//         del_en_f1 <= 0;
//         del_en_f2 <= 0;
//       end 
//     else 
//       begin 
//         del_en_f1 <= del_en_w;
//         del_en_f2 <= del_en_f1;
//       end 
//   end
// assign del_en =  del_en_f1 & (~del_en_f2);

always@(posedge clk or negedge rst_n)
  begin
    if(~rst_n)
      begin 
        modify_en_f1 <= 0;
        modify_en_f2 <= 0;
      end 
    else
      begin  
        modify_en_f1 <= modify_en_w;
        modify_en_f2 <= modify_en_f1;
      end 
  end
// assign modify_en = modify_en_w & (~modify_en_f1);
assign modify_en = modify_en_w;

always@(posedge clk or negedge rst_n)
  begin
    if(~rst_n)
      begin
        pe_num    <= 0;
      end
    else
      begin
        pe_num    <= ram_addr[LOG2X-1:0];  //5-0
      end
  end
always@(posedge clk or negedge rst_n)
  begin
    if(~rst_n)
      begin
        rule_num    <= 0;
      end
    else
      begin
        rule_num    <= ram_addr[LOG2X+LOG2R-1:LOG2X]; //8-6
      end
  end
assign pipeline_num = ram_addr[LOG2X+LOG2Y+LOG2R-1:LOG2X+LOG2R];//10-9
// always@(posedge clk or negedge rst_n)
//   begin
//     if(~rst_n)
//       begin
//         pipeline_num    <= 0;
//       end
//     else if(modify_en)
//       begin
//         pipeline_num    <= ram_addr[LOG2X+LOG2Y+LOG2R:LOG2X+LOG2R];
//       end
//     else 
//       pipeline_num <= 0;
//   end

always@(posedge clk or negedge rst_n)
  begin
    if(~rst_n)
      begin
        modify_value    <= 0;
      end
    else if(modify_en)
      begin
        modify_value    <= ram_data[15:0];
        end
    else 
      modify_value <= modify_value;
  end

always@(posedge clk or negedge rst_n)
  begin
    if(~rst_n)
      begin
        del_loc    <= 0;
      end
    else
      begin
        del_loc    <= {ram_addr[LOG2X+LOG2Y-1:LOG2X],ram_addr[LOG2X+LOG2Y-1+LOG2R:LOG2X+LOG2Y]};
      end
  end
always@(posedge clk or negedge rst_n)
  begin
    if(~rst_n)
      begin
        modify_loc    <= 0;
      end
    else
      begin
        modify_loc    <= {ram_addr[LOG2X+LOG2Y-1:LOG2X],ram_addr[LOG2X+LOG2Y-1+LOG2R:LOG2X+LOG2Y]};
      end
  end
always@(posedge clk or negedge rst_n)
  begin
    if(~rst_n)
      valid <= 32'hffffffff;
    // else if(del_en)
    //   valid[del_loc]<=1'b0;
    else if(modify_en)
      valid[modify_loc] <= 1'b1;
    else 
      valid <= valid;
  end
always@(posedge clk or negedge rst_n)
  begin
    if(~rst_n)
      lookup_done1 <= 0;
    else 
      lookup_done1 <= lookup_done1_ff;
  end
//always@(posedge clk or negedge rst_n)
//  begin
//    if(~rst_n)
//     lookup_success1 <= 0;
//    else 
//      lookup_success1 <= lookup_success1_ff;
//  end
assign match_res1=(lookup_done1==1)?bv_out1_4:0;
//*********************
endmodule    // hookup byte controller block

